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Optical Interconnects & The Physical Demise of Copper in AI Clusters

How Co-Packaged Optics (CPO) and Linear Pluggable Optics Solve the 1.6T Fabric Wall

The Skin Effect and the Physics Limit of Copper

In high-speed data transmission, electrical signals travel along the surface of copper conductors due to the physical phenomenon known as the Skin Effect. As signal frequencies increase to support 100 Gb/s and 200 Gb/s per differential pair (PAM4 signaling), the effective conductive area of the copper trace shrinks dramatically, causing severe dielectric attenuation, cross-talk, and signal degradation.

At 800 Gb/s per port, passive Direct Attach Copper (DAC) cables are physically limited to distances under 1.5 to 2.0 meters. Inside dense multi-rack clusters housing tens of thousands of GPUs, interconnecting leaf, spine, and core switches requires cable runs spanning tens to hundreds of meters. Copper cannot bridge this distance without active retimers that consume prohibitive amounts of electrical power.

The Power Penalty of Pluggable Optics

Traditional datacenters rely on pluggable optical transceivers (OSFP, QSFP-DD). However, converting high-frequency electrical signals from a switch ASIC into optical photons requires an on-module Digital Signal Processor (DSP):

  • An 800G pluggable transceiver consumes between 14W and 18W of power.
  • In a 64-port switch, transceivers consume over 1,000 Watts—surpassing the power consumed by the switch silicon itself.
  • Across a 16,384-GPU cluster with 60,000 optical transceivers, pluggable optics alone consume over 1 Megawatt of continuous electrical power.

Co-Packaged Optics (CPO): Integrating Silicon Photonics

The long-term engineering solution is Co-Packaged Optics (CPO). By placing the optical engines and semiconductor lasers directly on the same substrate package as the switch ASIC, the high-loss copper PCB traces between the ASIC and the front-panel cage are eliminated.

CPO slashes interconnect power consumption by 30% to 50%, reduces signal latency by eliminating intermediate DSP retimers, and enables the high-radix optical switches required to build non-blocking two-tier fabrics for 100,000-accelerator AI gigawatt clusters.

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