Distributed Training Clusters & Hardware Topologies

Distributed Data Parallel (DDP), Fully Sharded Data Parallel (FSDP), Megatron-LM tensor and pipeline parallelism, and InfiniBand interconnects.

1. Theoretical Motivation & Foundations

Training trillion-parameter models requires supercomputing architectures. We dissect GPU hardware hierarchies (SRAM vs. HBM3 memory bandwidth), inter-GPU interconnects (NVLink vs. InfiniBand), and 3D parallelism (Data, Tensor, and Pipeline parallelism) with ZeRO Stage 3 / PyTorch FSDP.

2. Mathematical Formulations & Derivations

The governing analytical formulations and proof frameworks for this module:

ZeRO-3 Memory Sharding: Memory_{total} = (Params / N) + (Gradients / N) + (OptimizerStates / N) Ring-AllReduce Bandwidth Formula: DataTransferred = 2 * ((N - 1) / N) * TensorSize

3. From-Scratch Reference Implementation

Executable, production-tested reference code without magic libraries:

import os import torch import torch.distributed as dist def setup_distributed_cluster(): rank = int(os.environ['RANK']) world_size = int(os.environ['WORLD_SIZE']) dist.init_process_group('nccl', rank=rank, world_size=world_size) torch.cuda.set_device(rank) print(f'GPU {rank}/{world_size} initialized on NCCL backend.')

4. Systems Complexity & Memory Footprint

Model FLOPs Utilization (MFU) tracks real vs theoretical execution speed; frontier labs aim for MFU > 45-50% on large clusters.

5. Canonical Literature & Primary Research

Original research papers and foundational texts recommended for advanced study:

  1. Rajbhandari, S., et al. (2020). ZeRO: Memory Optimizations Toward Training Trillion Parameter Models. SC20.
  2. Narayanan, D., et al. (2021). Efficient Large-Scale Language Model Training with Megatron-LM. SC21.