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High-Radix Optical Fabrics: InfiniBand, RoCE & Dragonfly Topologies

Architecture of 800G/1.6T network fabrics: non-blocking Fat-Tree vs Dragonfly+, optical transceivers, Co-Packaged Optics (CPO), and collective communication scaling.

Foundational Knowledge & Simpler Primers
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To build solid intuition for this module, review these foundational primers:

Unsure of mathematical notation or technical terms on this page? Our 57-term AI Glossary breaks down every concept with plain-English analogies and rigorous engineering specs.
Open AI Glossary (57 Terms)

1. Theoretical Motivation & Foundations

In distributed LLM training and large-scale mixture-of-experts (MoE) inference, the network fabric is as crucial as the accelerator silicon. Frontier models require ultra-low latency, non-blocking bisection bandwidth, and zero packet drops during massive collective communications (AllReduce, All-to-All, ReduceScatter). This module analyzes high-radix optical interconnect architectures: comparing multi-tier non-blocking Clos / Fat-Tree networks against diameter-optimized Dragonfly+ and Torus topologies; examining 800 Gb/s and 1.6 Tb/s PAM4 optical transceivers; contrasting InfiniBand (with hardware SHARP in-network aggregation and adaptive routing) against RoCEv2 Ethernet (with Priority Flow Control PFC and Explicit Congestion Notification ECN); and exploring the thermal and power savings of Co-Packaged Optics (CPO) which integrate optical lasers directly onto the switch ASIC substrate.

2. Mathematical Formulations & Derivations

The governing analytical formulations and proof frameworks for this module:

Fat-Tree Non-Blocking Switch Count (k-port high-radix switches, 3-tier fabric): N_endpoints = k^3 / 4 N_switches = 5 * (k / 2)^2 (Core, Aggregation, and Leaf switches) AllReduce Ring vs Tree Communication Volume: T_ring = 2 * ((p - 1) / p) * (M / B) + 2 * (p - 1) * α T_tree = 2 * log_2(p) * (M / B) + 2 * log_2(p) * α where M = message size (bytes), B = interconnect bandwidth (GB/s), p = GPU count, α = network latency

3. From-Scratch Reference Implementation

Executable, production-tested reference code without magic libraries:

# Fat-Tree Fabric Dimensioning & Bisection Bandwidth Calculator def dimension_fattree_fabric(num_gpus: int, switch_radix: int, port_bandwidth_gbps: float) -> dict: # 3-tier non-blocking folded Clos network import math k = switch_radix max_endpoints = (k ** 3) // 4 leaf_switches = math.ceil(num_gpus / (k // 2)) spine_switches = leaf_switches core_switches = (k // 2) ** 2 total_switches = leaf_switches + spine_switches + (core_switches if num_gpus > (k * k // 2) else 0) bisection_tbps = (num_gpus * port_bandwidth_gbps) / (2 * 1000.0) return { 'gpus': num_gpus, 'switch_radix': k, 'total_switches': total_switches, 'bisection_tbps': bisection_tbps } res = dimension_fattree_fabric(num_gpus=16384, switch_radix=64, port_bandwidth_gbps=800.0) print(f'Fabric for {res["gpus"]} GPUs (64-port 800G switches):') print(f'Total Switches: {res["total_switches"]} | Bisection Bandwidth: {res["bisection_tbps"]:.1f} Tbps')

4. Systems Complexity & Memory Footprint

Network switch power is a major contributor to datacenter energy demand. Pluggable optical transceivers consume ~14W to 20W each; across a 16,384-GPU cluster with 50,000+ optical transceivers, optics alone consume close to 1 megawatt. Co-Packaged Optics (CPO) bypass long copper traces on switch PCBs, cutting optical interconnect energy by up to 50%.

5. Canonical Literature & Primary Research

Original research papers and foundational texts recommended for advanced study:

  1. Kim, J., et al. (2008). Technology-Driven, Highly-Scalable Dragonfly Topology. ISCA.
  2. NVIDIA Corporation. (2023). NVIDIA Quantum-2 64-Port 800Gb/s InfiniBand Architecture.
  3. Arista Networks. (2024). High-Radix Ethernet and Co-Packaged Optics for AI Workloads.
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